About

About AccelFury

AccelFury is a deep-technical FPGA engineering project with a current public focus on af-pdm-rx and evidence-first documentation. This page avoids invented biographies and instead describes the public proof surface and project operating rules.

Project

What AccelFury is

AccelFury is presented publicly as an FPGA IP and hardware acceleration engineering project with a current public proof point in af-pdm-rx.

Public footprint

Public website, public GitHub organization and public af-pdm-rx repository.

Current public proof

Portable Verilog PDM RX IP, release docs, verification notes and archived build evidence.

Public contact

mail@accelfury.com

Principles

Operating principles

The public site is intentionally constrained to claims that can be backed by repo-visible docs, tests, release notes or hardware evidence.

  • Portable RTL should stay portable and board-neutral where possible.
  • Board support is evidence-gated, not implied by a wrapper name.
  • Benchmarks are workload-specific and remain pending until measured.
  • Research pages stay research pages until production evidence exists.

Boundary

What is not public yet

The site does not claim a broad public customer list, public investor list, public production ZK API or a large released IP catalog.

  • Named customers: not publicly available yet
  • Named investors: not publicly available yet
  • Public production API: not publicly available yet
  • Additional public IP cores: not publicly available yet

Next step

Need a factual project review?

Start from the public docs and repository links, then send the board, workload and evaluation criteria that matter for your review.