Inputs
Component manifest, RTL, target constraints and tool configuration.
AccelFury
FPGA CLI
A command-line tool for FPGA component checks, simulation and formal verification.
- Stage
- Release status unconfirmed
- Access
- Availability unconfirmed
Capabilities
The current source describes the fpga command; version-specific test results have not been independently reviewed.
| Function | Purpose |
|---|---|
| Component checks | Validate manifests and check RTL structure. |
| Simulation | Run supported Verilator or Icarus simulation flows. |
| Formal verification | Run supported SymbiYosys property checks. |
| Reports | Produce structured results and machine-readable errors. |
Evaluation
Confirm the supplied version, required EDA tools and license before running a check.
Outputs
Reports for the checks that ran, including errors and execution details.
License terms for the current distribution are unconfirmed.
Limitations
- No current installation command or evaluation package is confirmed.
- Workflow support depends on the supplied version and configuration.
- Integration with a tool does not establish support for every target.